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portada Simulated Annealing for VLSI Design (in English)
Type
Physical Book
Publisher
Language
Inglés
Pages
202
Format
Paperback
Dimensions
23.4 x 15.6 x 1.2 cm
Weight
0.31 kg.
ISBN13
9781461289470

Simulated Annealing for VLSI Design (in English)

H. W. Liu (Author) · D. F. Wong (Author) · H. W. Leong (Author) · Springer · Paperback

Simulated Annealing for VLSI Design (in English) - Wong, D. F. ; Leong, H. W. ; Liu, H. W.

Physical Book

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Synopsis "Simulated Annealing for VLSI Design (in English)"

This monograph represents a summary of our work in the last two years in applying the method of simulated annealing to the solution of problems that arise in the physical design of VLSI circuits. Our study is experimental in nature, in that we are con- cerned with issues such as solution representations, neighborhood structures, cost functions, approximation schemes, and so on, in order to obtain good design results in a reasonable amount of com- putation time. We hope that our experiences with the techniques we employed, some of which indeed bear certain similarities for different problems, could be useful as hints and guides for other researchers in applying the method to the solution of other prob- lems. Work reported in this monograph was partially supported by the National Science Foundation under grant MIP 87-03273, by the Semiconductor Research Corporation under contract 87-DP- 109, by a grant from the General Electric Company, and by a grant from the Sandia Laboratories.

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All books in our catalog are Original.
The book is written in English.
The binding of this edition is Paperback.

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