Share
Implementation of a Binary Floating Point Fused Multiply-Add Unit (in English)
Abdel Aziz Ibrahim Walaa; Aly Fahmy Hossam; Hussien Khalil Ahmed (Author)
·
Lap Lambert Academic Publishing
· Paperback
Implementation of a Binary Floating Point Fused Multiply-Add Unit (in English) - Abdel Aziz Ibrahim Walaa; Aly Fahmy Hossam; Hussien Khalil Ahmed
$ 44.57
$ 52.92
You save: $ 8.35
Choose the list to add your product or create one New List
✓ Product added successfully to the Wishlist.
Go to My WishlistsIt will be shipped from our warehouse between
Wednesday, July 03 and
Thursday, July 04.
You will receive it anywhere in United States between 1 and 3 business days after shipment.
Synopsis "Implementation of a Binary Floating Point Fused Multiply-Add Unit (in English)"
The fused multiply add (FMA) operation is very important in many scientific and engineering applications. It is a key feature of the floating-point unit (FPU), which greatly increases the floating-point performance and accuracy.Many approaches are developed on floating-point fused multiply add unit to decrease its latency.two of these approaches are implemented in the Verilog hardware description language. ModelSim10.0c is a used to compile Verilog codes and to simulate them.
- 0% (0)
- 0% (0)
- 0% (0)
- 0% (0)
- 0% (0)
All books in our catalog are Original.
The book is written in English.
The binding of this edition is Paperback.
✓ Producto agregado correctamente al carro, Ir a Pagar.