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portada Die-Stacking Architecture (in English)
Type
Physical Book
Publisher
Language
Inglés
Pages
113
Format
Paperback
Dimensions
23.5 x 19.1 x 0.7 cm
Weight
0.23 kg.
ISBN13
9783031006197

Die-Stacking Architecture (in English)

Yuan Xie (Author) · Jishen Zhao (Author) · Springer · Paperback

Die-Stacking Architecture (in English) - Xie, Yuan ; Zhao, Jishen

Physical Book

$ 42.62

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Synopsis "Die-Stacking Architecture (in English)"

The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the "memory wall" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to designing future 3D microprocessor systems, by leveraging the benefits of low latency, high bandwidth, and heterogeneous integration capability which are offered by 3D technology.

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All books in our catalog are Original.
The book is written in English.
The binding of this edition is Paperback.

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